Index of /llvm-10.0.1/test/CodeGen/AArch64/GlobalISel

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[   ]arm64-callingconv-ios.ll2020-07-07 12:21 1.6K 
[   ]arm64-callingconv.ll2020-07-07 12:21 5.1K 
[   ]arm64-fallback.ll2020-07-07 12:21 9.7K 
[   ]arm64-irtranslator-fmuladd.ll2020-07-07 12:21 1.6K 
[   ]arm64-irtranslator-gep.ll2020-07-07 12:21 2.6K 
[   ]arm64-irtranslator-stackprotect.ll2020-07-07 12:21 897  
[   ]arm64-irtranslator-switch.ll2020-07-07 12:21 58K 
[   ]arm64-irtranslator.ll2020-07-07 12:21 89K 
[   ]arm64-regbankselect.mir2020-07-07 12:21 26K 
[   ]call-lowering-i128-on-stack.ll2020-07-07 12:21 396  
[   ]call-lowering-i256-crash.ll2020-07-07 12:21 188  
[   ]call-translator-cse.ll2020-07-07 12:21 1.4K 
[   ]call-translator-ios.ll2020-07-07 12:21 4.1K 
[   ]call-translator-musttail.ll2020-07-07 12:21 704  
[   ]call-translator-tail-call-weak.ll2020-07-07 12:21 736  
[   ]call-translator-tail-call.ll2020-07-07 12:21 11K 
[   ]call-translator-variadic-musttail.ll2020-07-07 12:21 8.7K 
[   ]call-translator.ll2020-07-07 12:21 12K 
[   ]combine-anyext-crash.mir2020-07-07 12:21 919  
[   ]combine-copy.mir2020-07-07 12:21 2.4K 
[   ]combiner-load-store-indexing.ll2020-07-07 12:21 5.1K 
[   ]const-0.ll2020-07-07 12:21 625  
[   ]constant-dbg-loc.ll2020-07-07 12:21 3.7K 
[   ]contract-store.mir2020-07-07 12:21 2.8K 
[   ]debug-cpp.ll2020-07-07 12:21 3.2K 
[   ]debug-insts.ll2020-07-07 12:21 3.9K 
[   ]dynamic-alloca-lifetime.ll2020-07-07 12:21 1.5K 
[   ]dynamic-alloca.ll2020-07-07 12:21 2.6K 
[   ]fallback-nofastisel.ll2020-07-07 12:21 489  
[   ]fold-fp-select.mir2020-07-07 12:21 12K 
[   ]fold-select.mir2020-07-07 12:21 2.0K 
[   ]fp16-copy-gpr.mir2020-07-07 12:21 3.6K 
[   ]fp128-legalize-crash-pr35690.mir2020-07-07 12:21 1.3K 
[   ]gisel-abort.ll2020-07-07 12:21 203  
[   ]gisel-commandline-option-fastisel.ll2020-07-07 12:21 1.3K 
[   ]gisel-commandline-option.ll2020-07-07 12:21 3.2K 
[   ]gisel-fail-intermediate-legalizer.ll2020-07-07 12:21 257  
[   ]inline-asm.ll2020-07-07 12:21 299  
[   ]inline-memcpy.mir2020-07-07 12:21 13K 
[   ]inline-memmove.mir2020-07-07 12:21 7.4K 
[   ]inline-memset.mir2020-07-07 12:21 5.8K 
[   ]inline-small-memcpy.mir2020-07-07 12:21 3.1K 
[   ]integration-shuffle-vector.ll2020-07-07 12:21 1.2K 
[   ]irtranslator-bitcast.ll2020-07-07 12:21 916  
[   ]irtranslator-block-order.ll2020-07-07 12:21 356  
[   ]irtranslator-dilocation.ll2020-07-07 12:21 2.7K 
[   ]irtranslator-duplicate-types-param.ll2020-07-07 12:21 609  
[   ]irtranslator-exceptions.ll2020-07-07 12:21 3.0K 
[   ]irtranslator-extends.ll2020-07-07 12:21 909  
[   ]irtranslator-fp-min-max-intrinsics.ll2020-07-07 12:21 3.2K 
[   ]irtranslator-max-address-space.ll2020-07-07 12:21 1.2K 
[   ]irtranslator-memfunc-undef.ll2020-07-07 12:21 1.5K 
[   ]irtranslator-split-vector-arg.ll2020-07-07 12:21 950  
[   ]irtranslator-stackprotect-check.ll2020-07-07 12:21 2.3K 
[   ]irtranslator-tbaa.ll2020-07-07 12:21 685  
[   ]irtranslator-volatile-load-pr36018.ll2020-07-07 12:21 357  
[   ]irtranslator-weird-alloca-size.ll2020-07-07 12:21 800  
[   ]legalize-add.mir2020-07-07 12:21 6.2K 
[   ]legalize-and.mir2020-07-07 12:21 1.0K 
[   ]legalize-atomicrmw.mir2020-07-07 12:21 2.8K 
[   ]legalize-blockaddress.mir2020-07-07 12:21 1.4K 
[   ]legalize-bswap.mir2020-07-07 12:21 1.3K 
[   ]legalize-build-vector.mir2020-07-07 12:21 1.9K 
[   ]legalize-ceil.mir2020-07-07 12:21 3.7K 
[   ]legalize-cmp.mir2020-07-07 12:21 3.1K 
[   ]legalize-cmpxchg-with-success.mir2020-07-07 12:21 2.1K 
[   ]legalize-cmpxchg.mir2020-07-07 12:21 3.2K 
[   ]legalize-combines.mir2020-07-07 12:21 3.6K 
[   ]legalize-concat-vectors.mir2020-07-07 12:21 1.4K 
[   ]legalize-constant.mir2020-07-07 12:21 2.7K 
[   ]legalize-cos.mir2020-07-07 12:21 6.6K 
[   ]legalize-div.mir2020-07-07 12:21 3.0K 
[   ]legalize-dyn-alloca.mir2020-07-07 12:21 5.4K 
[   ]legalize-exceptions.ll2020-07-07 12:21 1.4K 
[   ]legalize-exp.mir2020-07-07 12:21 6.6K 
[   ]legalize-ext-cse.mir2020-07-07 12:21 855  
[   ]legalize-ext-csedebug-output.mir2020-07-07 12:21 1.4K 
[   ]legalize-ext.mir2020-07-07 12:21 12K 
[   ]legalize-extload.mir2020-07-07 12:21 4.2K 
[   ]legalize-extract-vector-elt.mir2020-07-07 12:21 756  
[   ]legalize-extracts.mir2020-07-07 12:21 683  
[   ]legalize-fcmp.mir2020-07-07 12:21 1.0K 
[   ]legalize-fexp2.mir2020-07-07 12:21 13K 
[   ]legalize-fma.mir2020-07-07 12:21 12K 
[   ]legalize-fp-arith.mir2020-07-07 12:21 2.3K 
[   ]legalize-fptoi.mir2020-07-07 12:21 7.0K 
[   ]legalize-frint.mir2020-07-07 12:21 9.0K 
[   ]legalize-ignore-non-generic.mir2020-07-07 12:21 743  
[   ]legalize-inserts.mir2020-07-07 12:21 771  
[   ]legalize-intrinsic-round.mir2020-07-07 12:21 11K 
[   ]legalize-intrinsic-trunc.mir2020-07-07 12:21 9.1K 
[   ]legalize-inttoptr-xfail-1.mir2020-07-07 12:21 1.4K 
[   ]legalize-inttoptr-xfail-2.mir2020-07-07 12:21 1.6K 
[   ]legalize-itofp.mir2020-07-07 12:21 8.0K 
[   ]legalize-load-store-fewerElts.mir2020-07-07 12:21 1.3K 
[   ]legalize-load-store-vector-of-ptr.mir2020-07-07 12:21 2.5K 
[   ]legalize-load-store.mir2020-07-07 12:21 10K 
[   ]legalize-load-trunc.mir2020-07-07 12:21 1.0K 
[   ]legalize-log.mir2020-07-07 12:21 6.6K 
[   ]legalize-log2.mir2020-07-07 12:21 6.6K 
[   ]legalize-log10.mir2020-07-07 12:21 6.6K 
[   ]legalize-memcpy-et-al.mir2020-07-07 12:21 6.1K 
[   ]legalize-merge-values.mir2020-07-07 12:21 1.0K 
[   ]legalize-mul.mir2020-07-07 12:21 2.4K 
[   ]legalize-nearbyint.mir2020-07-07 12:21 9.3K 
[   ]legalize-non-pow2-load-store.mir2020-07-07 12:21 2.0K 
[   ]legalize-or.mir2020-07-07 12:21 1.9K 
[   ]legalize-phi-insertpt-decrement.mir2020-07-07 12:21 3.7K 
[   ]legalize-phi.mir2020-07-07 12:21 21K 
[   ]legalize-pow.mir2020-07-07 12:21 16K 
[   ]legalize-property.mir2020-07-07 12:21 413  
[   ]legalize-ptr-add.mir2020-07-07 12:21 849  
[   ]legalize-rem.mir2020-07-07 12:21 4.2K 
[   ]legalize-s128-div.mir2020-07-07 12:21 3.8K 
[   ]legalize-select.mir2020-07-07 12:21 3.3K 
[   ]legalize-sext-128.ll2020-07-07 12:21 276  
[   ]legalize-sext-128.mir2020-07-07 12:21 748  
[   ]legalize-sext-copy.mir2020-07-07 12:21 693  
[   ]legalize-sext-zext-128.mir2020-07-07 12:21 3.0K 
[   ]legalize-sext.mir2020-07-07 12:21 744  
[   ]legalize-sextload.mir2020-07-07 12:21 538  
[   ]legalize-shift.mir2020-07-07 12:21 11K 
[   ]legalize-shuffle-vector.mir2020-07-07 12:21 2.4K 
[   ]legalize-simple.mir2020-07-07 12:21 5.2K 
[   ]legalize-sin.mir2020-07-07 12:21 6.6K 
[   ]legalize-sqrt.mir2020-07-07 12:21 3.7K 
[   ]legalize-sub.mir2020-07-07 12:21 863  
[   ]legalize-undef.mir2020-07-07 12:21 2.5K 
[   ]legalize-unmerge-values.mir2020-07-07 12:21 961  
[   ]legalize-vaarg.mir2020-07-07 12:21 1.4K 
[   ]legalize-vector-icmp.mir2020-07-07 12:21 58K 
[   ]legalize-vector-shift.mir2020-07-07 12:21 2.4K 
[   ]legalize-xor.mir2020-07-07 12:21 863  
[   ]legalize-zextload.mir2020-07-07 12:21 538  
[   ]legalizer-combiner-zext-trunc-crash.mir2020-07-07 12:21 2.7K 
[   ]legalizer-combiner.mir2020-07-07 12:21 3.3K 
[   ]legalizer-info-validation.mir2020-07-07 12:21 31K 
[   ]lit.local.cfg2020-07-07 12:21 86  
[   ]load-addressing-modes.mir2020-07-07 12:21 21K 
[   ]load-wro-addressing-modes.mir2020-07-07 12:21 12K 
[   ]localizer-arm64-tti.ll2020-07-07 12:21 2.5K 
[   ]localizer-in-O0-pipeline.mir2020-07-07 12:21 3.3K 
[   ]localizer.mir2020-07-07 12:21 14K 
[   ]machine-cse-mid-pipeline.mir2020-07-07 12:21 11K 
[   ]memcpy_chk_no_tail.ll2020-07-07 12:21 1.2K 
[   ]no-neon-no-fp.ll2020-07-07 12:21 536  
[   ]no-regclass.mir2020-07-07 12:21 962  
[   ]non-pow-2-extload-combine.mir2020-07-07 12:21 1.1K 
[   ]observer-change-crash.mir2020-07-07 12:21 763  
[   ]opt-fold-compare.mir2020-07-07 12:21 16K 
[   ]opt-shuffle-splat.mir2020-07-07 12:21 7.3K 
[   ]prelegalizercombiner-br.mir2020-07-07 12:21 2.4K 
[   ]prelegalizercombiner-concat-vectors.mir2020-07-07 12:21 5.4K 
[   ]prelegalizercombiner-copy-prop-disabled.mir2020-07-07 12:21 1.2K 
[   ]prelegalizercombiner-extending-loads-cornercases.mir2020-07-07 12:21 10K 
[   ]prelegalizercombiner-extending-loads-s1.mir2020-07-07 12:21 1.2K 
[   ]prelegalizercombiner-extending-loads.mir2020-07-07 12:21 12K 
[   ]prelegalizercombiner-ptradd-chain.mir2020-07-07 12:21 2.3K 
[   ]prelegalizercombiner-shuffle-vector.mir2020-07-07 12:21 19K 
[   ]reg-bank-128bit.mir2020-07-07 12:21 588  
[   ]regbank-ceil.ll2020-07-07 12:21 536  
[   ]regbank-extract-vector-elt.mir2020-07-07 12:21 2.8K 
[   ]regbank-extract.mir2020-07-07 12:21 737  
[   ]regbank-fma.mir2020-07-07 12:21 1.7K 
[   ]regbank-fp-use-def.mir2020-07-07 12:21 3.6K 
[   ]regbank-insert-vector-elt.mir2020-07-07 12:21 5.1K 
[   ]regbank-intrinsic-round.mir2020-07-07 12:21 5.2K 
[   ]regbank-intrinsic-trunc.mir2020-07-07 12:21 1.4K 
[   ]regbank-nearbyint.mir2020-07-07 12:21 4.2K 
[   ]regbank-select.mir2020-07-07 12:21 5.9K 
[   ]regbank-shift-imm-64.mir2020-07-07 12:21 3.6K 
[   ]regbank-trunc-s128.mir2020-07-07 12:21 719  
[   ]regbankselect-build-vector.mir2020-07-07 12:21 1.6K 
[   ]regbankselect-dbg-value.mir2020-07-07 12:21 1.7K 
[   ]regbankselect-default.mir2020-07-07 12:21 21K 
[   ]regbankselect-reg_sequence.mir2020-07-07 12:21 611  
[   ]regbankselect-unmerge-vec.mir2020-07-07 12:21 1.5K 
[   ]ret-1x-vec.ll2020-07-07 12:21 781  
[   ]ret-vec-promote.ll2020-07-07 12:21 760  
[   ]retry-artifact-combine.mir2020-07-07 12:21 1.0K 
[   ]select-arith-extended-reg.mir2020-07-07 12:21 19K 
[   ]select-arith-shifted-reg.mir2020-07-07 12:21 11K 
[   ]select-atomic-load-store.mir2020-07-07 12:21 1.0K 
[   ]select-atomicrmw.mir2020-07-07 12:21 7.5K 
[   ]select-binop.mir2020-07-07 12:21 27K 
[   ]select-bitcast-bigendian.mir2020-07-07 12:21 514  
[   ]select-bitcast.mir2020-07-07 12:21 4.8K 
[   ]select-blockaddress.mir2020-07-07 12:21 3.2K 
[   ]select-br.mir2020-07-07 12:21 1.3K 
[   ]select-bswap.mir2020-07-07 12:21 2.7K 
[   ]select-build-vector.mir2020-07-07 12:21 6.5K 
[   ]select-cbz.mir2020-07-07 12:21 4.7K 
[   ]select-ceil.mir2020-07-07 12:21 2.9K 
[   ]select-cmp.mir2020-07-07 12:21 3.7K 
[   ]select-cmpxchg.mir2020-07-07 12:21 1.8K 
[   ]select-concat-vectors.mir2020-07-07 12:21 2.4K 
[   ]select-constant.mir2020-07-07 12:21 4.2K 
[   ]select-ctlz.mir2020-07-07 12:21 5.2K 
[   ]select-dbg-value.mir2020-07-07 12:21 2.7K 
[   ]select-extload.mir2020-07-07 12:21 1.4K 
[   ]select-extract-vector-elt.mir2020-07-07 12:21 5.9K 
[   ]select-extract.mir2020-07-07 12:21 885  
[   ]select-fabs.mir2020-07-07 12:21 2.9K 
[   ]select-fcmp.mir2020-07-07 12:21 1.7K 
[   ]select-floor.mir2020-07-07 12:21 3.0K 
[   ]select-fma.mir2020-07-07 12:21 1.0K 
[   ]select-fp-casts.mir2020-07-07 12:21 12K 
[   ]select-frint-nofp16.mir2020-07-07 12:21 9.8K 
[   ]select-frint.mir2020-07-07 12:21 4.7K 
[   ]select-gv-cmodel-large.mir2020-07-07 12:21 3.3K 
[   ]select-gv-cmodel-tiny.mir2020-07-07 12:21 2.6K 
[   ]select-imm.mir2020-07-07 12:21 1.3K 
[   ]select-implicit-def.mir2020-07-07 12:21 1.2K 
[   ]select-insert-extract.mir2020-07-07 12:21 3.2K 
[   ]select-insert-vector-elt.mir2020-07-07 12:21 5.2K 
[   ]select-int-ext.mir2020-07-07 12:21 12K 
[   ]select-int-ptr-casts.mir2020-07-07 12:21 3.3K 
[   ]select-intrinsic-aarch64-hint.mir2020-07-07 12:21 681  
[   ]select-intrinsic-aarch64-sdiv.mir2020-07-07 12:21 1.0K 
[   ]select-intrinsic-crypto-aesmc.mir2020-07-07 12:21 1.0K 
[   ]select-intrinsic-round.mir2020-07-07 12:21 5.1K 
[   ]select-intrinsic-trunc.mir2020-07-07 12:21 5.1K 
[   ]select-jump-table-brjt.mir2020-07-07 12:21 4.4K 
[   ]select-ldaxr-intrin.mir2020-07-07 12:21 3.3K 
[   ]select-ldxr-intrin.mir2020-07-07 12:21 3.2K 
[   ]select-load-store-vector-of-ptr.mir2020-07-07 12:21 2.0K 
[   ]select-load.mir2020-07-07 12:21 16K 
[   ]select-logical-imm.mir2020-07-07 12:21 3.5K 
[   ]select-logical-shifted-reg.mir2020-07-07 12:21 2.3K 
[   ]select-mul.mir2020-07-07 12:21 1.1K 
[   ]select-muladd.mir2020-07-07 12:21 1.1K 
[   ]select-nearbyint.mir2020-07-07 12:21 4.2K 
[   ]select-neon-vcvtfxu2fp.mir2020-07-07 12:21 1.0K 
[   ]select-phi.mir2020-07-07 12:21 3.2K 
[   ]select-pr32733.mir2020-07-07 12:21 1.7K 
[   ]select-property.mir2020-07-07 12:21 535  
[   ]select-redundant-zext-of-load.mir2020-07-07 12:21 1.4K 
[   ]select-scalar-merge.mir2020-07-07 12:21 1.1K 
[   ]select-scalar-shift-imm.mir2020-07-07 12:21 4.8K 
[   ]select-select.mir2020-07-07 12:21 2.1K 
[   ]select-sextload.mir2020-07-07 12:21 1.4K 
[   ]select-shuffle-vector.mir2020-07-07 12:21 6.6K 
[   ]select-shufflevec-undef-mask-elt.mir2020-07-07 12:21 2.3K 
[   ]select-sqrt.mir2020-07-07 12:21 2.9K 
[   ]select-stlxr-intrin.mir2020-07-07 12:21 4.2K 
[   ]select-store.mir2020-07-07 12:21 13K 
[   ]select-stx.mir2020-07-07 12:21 4.2K 
[   ]select-trap.mir2020-07-07 12:21 779  
[   ]select-trunc.mir2020-07-07 12:21 2.7K 
[   ]select-uaddo.mir2020-07-07 12:21 2.1K 
[   ]select-unmerge.mir2020-07-07 12:21 6.8K 
[   ]select-vector-icmp.mir2020-07-07 12:21 101K 
[   ]select-vector-shift.mir2020-07-07 12:21 10K 
[   ]select-with-no-legality-check.mir2020-07-07 12:21 129K 
[   ]select-xor.mir2020-07-07 12:21 3.7K 
[   ]select-zextload.mir2020-07-07 12:21 4.9K 
[   ]select.mir2020-07-07 12:21 10K 
[   ]store-addressing-modes.mir2020-07-07 12:21 5.1K 
[   ]store-wro-addressing-modes.mir2020-07-07 12:21 1.6K 
[   ]swifterror.ll2020-07-07 12:21 16K 
[   ]swiftself.ll2020-07-07 12:21 2.0K 
[   ]tail-call-no-save-fp-lr.ll2020-07-07 12:21 615  
[   ]translate-constant-dag.ll2020-07-07 12:21 3.3K 
[   ]translate-gep.ll2020-07-07 12:21 4.5K 
[   ]unknown-intrinsic.ll2020-07-07 12:21 237  
[   ]varargs-ios-translator.ll2020-07-07 12:21 713  
[   ]vastart.ll2020-07-07 12:21 700  
[   ]vec-s16-param.ll2020-07-07 12:21 1.3K