Index of /llvm-10.0.1/test/CodeGen/RISCV

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[   ]zext-with-load-is-free.ll2020-07-07 12:21 2.3K 
[   ]wide-mem.ll2020-07-07 12:21 866  
[   ]verify-instr.mir2020-07-07 12:21 254  
[   ]vararg.ll2020-07-07 12:21 89K 
[   ]urem-vector-lkk.ll2020-07-07 12:21 36K 
[   ]urem-lkk.ll2020-07-07 12:21 8.7K 
[   ]umulo-128-legalisation-lowering.ll2020-07-07 12:21 4.3K 
[   ]tls-models.ll2020-07-07 12:21 6.3K 
[   ]target-abi-valid.ll2020-07-07 12:21 1.8K 
[   ]target-abi-invalid.ll2020-07-07 12:21 3.3K 
[   ]tail-calls.ll2020-07-07 12:21 6.0K 
[   ]subtarget-features-std-ext.ll2020-07-07 12:21 738  
[   ]stack-realignment.ll2020-07-07 12:21 15K 
[   ]stack-realignment-with-variable-sized-objects.ll2020-07-07 12:21 2.2K 
[   ]srem-vector-lkk.ll2020-07-07 12:21 44K 
[   ]srem-lkk.ll2020-07-07 12:21 15K 
[   ]split-sp-adjust.ll2020-07-07 12:21 1.4K 
[   ]split-offsets.ll2020-07-07 12:21 4.1K 
[   ]shrinkwrap.ll2020-07-07 12:21 2.9K 
[   ]shifts.ll2020-07-07 12:21 8.1K 
[   ]shift-masked-shamt.ll2020-07-07 12:21 1.9K 
[   ]sext-zext-trunc.ll2020-07-07 12:21 9.6K 
[   ]setcc-logic.ll2020-07-07 12:21 3.4K 
[   ]select-optimize-multiple.mir2020-07-07 12:21 6.9K 
[   ]select-optimize-multiple.ll2020-07-07 12:21 10K 
[   ]select-cc.ll2020-07-07 12:21 2.9K 
[   ]sdata-local-sym.ll2020-07-07 12:21 535  
[   ]sdata-limit-8.ll2020-07-07 12:21 506  
[   ]sdata-limit-4.ll2020-07-07 12:21 516  
[   ]sdata-limit-0.ll2020-07-07 12:21 504  
[   ]rv64m-w-insts-legalization.ll2020-07-07 12:21 1.3K 
[   ]rv64m-exhaustive-w-insts.ll2020-07-07 12:21 34K 
[   ]rv64i-w-insts-legalization.ll2020-07-07 12:21 3.0K 
[   ]rv64i-tricky-shifts.ll2020-07-07 12:21 1.3K 
[   ]rv64i-single-softfloat.ll2020-07-07 12:21 22K 
[   ]rv64i-exhaustive-w-insts.ll2020-07-07 12:21 42K 
[   ]rv64i-complex-float.ll2020-07-07 12:21 2.2K 
[   ]rv64f-float-convert.ll2020-07-07 12:21 5.1K 
[   ]rv64d-double-convert.ll2020-07-07 12:21 3.5K 
[   ]rv64-large-stack.ll2020-07-07 12:21 1.1K 
[   ]rv32i-rv64i-float-double.ll2020-07-07 12:21 2.5K 
[   ]rv32e.ll2020-07-07 12:21 175  
[   ]rotl-rotr.ll2020-07-07 12:21 1.0K 
[   ]reserved-regs.ll2020-07-07 12:21 7.4K 
[   ]reserved-reg-errors.ll2020-07-07 12:21 1.9K 
[   ]remat.ll2020-07-07 12:21 7.1K 
[   ]rem.ll2020-07-07 12:21 2.1K 
[   ]readcyclecounter.ll2020-07-07 12:21 914  
[   ]prefetch.ll2020-07-07 12:21 597  
[   ]pr40333.ll2020-07-07 12:21 700  
[   ]pic-models.ll2020-07-07 12:21 2.7K 
[   ]option-rvc.ll2020-07-07 12:21 483  
[   ]option-relax.ll2020-07-07 12:21 441  
[   ]option-norvc.ll2020-07-07 12:21 485  
[   ]option-norelax.ll2020-07-07 12:21 441  
[   ]musttail-call.ll2020-07-07 12:21 716  
[   ]mul.ll2020-07-07 12:21 7.6K 
[   ]module-target-abi2.ll2020-07-07 12:21 931  
[   ]module-target-abi.ll2020-07-07 12:21 805  
[   ]mir-target-flags.ll2020-07-07 12:21 2.9K 
[   ]mem64.ll2020-07-07 12:21 5.7K 
[   ]mem.ll2020-07-07 12:21 5.0K 
[   ]mattr-invalid-combination.ll2020-07-07 12:21 162  
[   ]machineoutliner.mir2020-07-07 12:21 3.6K 
[   ]lsr-legaladdimm.ll2020-07-07 12:21 1.6K 
[   ]lit.local.cfg2020-07-07 12:21 69  
[   ]legalize-fneg.ll2020-07-07 12:21 2.3K 
[   ]large-stack.ll2020-07-07 12:21 6.7K 
[   ]jumptable.ll2020-07-07 12:21 1.5K 
[DIR]intrinsics/2020-07-07 12:21 -  
[   ]interrupt-attr.ll2020-07-07 12:21 40K 
[   ]interrupt-attr-ret-error.ll2020-07-07 12:21 335  
[   ]interrupt-attr-nocall.ll2020-07-07 12:21 27K 
[   ]interrupt-attr-invalid.ll2020-07-07 12:21 318  
[   ]interrupt-attr-callee.ll2020-07-07 12:21 2.5K 
[   ]interrupt-attr-args-error.ll2020-07-07 12:21 333  
[   ]inline-asm.ll2020-07-07 12:21 7.4K 
[   ]inline-asm-invalid.ll2020-07-07 12:21 1.1K 
[   ]inline-asm-i-constraint-i1.ll2020-07-07 12:21 385  
[   ]inline-asm-f-constraint-f.ll2020-07-07 12:21 1.9K 
[   ]inline-asm-f-abi-names.ll2020-07-07 12:21 43K 
[   ]inline-asm-d-constraint-f.ll2020-07-07 12:21 2.3K 
[   ]inline-asm-d-abi-names.ll2020-07-07 12:21 44K 
[   ]inline-asm-clobbers.ll2020-07-07 12:21 2.3K 
[   ]inline-asm-abi-names.ll2020-07-07 12:21 43K 
[   ]init-array.ll2020-07-07 12:21 1.3K 
[   ]indirectbr.ll2020-07-07 12:21 1.1K 
[   ]imm.ll2020-07-07 12:21 6.2K 
[   ]imm-cse.ll2020-07-07 12:21 1.2K 
[   ]i32-icmp.ll2020-07-07 12:21 3.5K 
[   ]hoist-global-addr-base.ll2020-07-07 12:21 5.6K 
[   ]get-setcc-result-type.ll2020-07-07 12:21 1.0K 
[   ]get-register-reserve.ll2020-07-07 12:21 1.1K 
[   ]get-register-noreserve.ll2020-07-07 12:21 965  
[   ]get-register-invalid.ll2020-07-07 12:21 299  
[   ]frameaddr-returnaddr.ll2020-07-07 12:21 4.3K 
[   ]frame.ll2020-07-07 12:21 1.9K 
[   ]frame-info.ll2020-07-07 12:21 7.9K 
[   ]fp128.ll2020-07-07 12:21 3.0K 
[   ]fp16-promote.ll2020-07-07 12:21 4.0K 
[   ]flt-rounds.ll2020-07-07 12:21 628  
[   ]float-select-fcmp.ll2020-07-07 12:21 15K 
[   ]float-mem.ll2020-07-07 12:21 6.2K 
[   ]float-intrinsics.ll2020-07-07 12:21 16K 
[   ]float-imm.ll2020-07-07 12:21 1.5K 
[   ]float-frem.ll2020-07-07 12:21 522  
[   ]float-fcmp.ll2020-07-07 12:21 8.8K 
[   ]float-convert.ll2020-07-07 12:21 5.2K 
[   ]float-br-fcmp.ll2020-07-07 12:21 23K 
[   ]float-bitmanip-dagcombines.ll2020-07-07 12:21 3.6K 
[   ]float-bit-preserving-dagcombines.ll2020-07-07 12:21 12K 
[   ]float-arith.ll2020-07-07 12:21 12K 
[   ]fixups-relax-diff.ll2020-07-07 12:21 775  
[   ]fixups-diff.ll2020-07-07 12:21 1.8K 
[   ]fastcc-int.ll2020-07-07 12:21 2.4K 
[   ]fastcc-float.ll2020-07-07 12:21 2.2K 
[   ]exception-pointer-register.ll2020-07-07 12:21 3.2K 
[   ]dwarf-eh.ll2020-07-07 12:21 2.5K 
[   ]double-stack-spill-restore.ll2020-07-07 12:21 2.2K 
[   ]double-select-fcmp.ll2020-07-07 12:21 19K 
[   ]double-previous-failure.ll2020-07-07 12:21 1.7K 
[   ]double-mem.ll2020-07-07 12:21 8.1K 
[   ]double-intrinsics.ll2020-07-07 12:21 18K 
[   ]double-imm.ll2020-07-07 12:21 2.0K 
[   ]double-frem.ll2020-07-07 12:21 526  
[   ]double-fcmp.ll2020-07-07 12:21 12K 
[   ]double-convert.ll2020-07-07 12:21 7.5K 
[   ]double-calling-conv.ll2020-07-07 12:21 4.8K 
[   ]double-br-fcmp.ll2020-07-07 12:21 22K 
[   ]double-bitmanip-dagcombines.ll2020-07-07 12:21 4.3K 
[   ]double-arith.ll2020-07-07 12:21 17K 
[   ]div.ll2020-07-07 12:21 12K 
[   ]disjoint.ll2020-07-07 12:21 1.1K 
[   ]disable-tail-calls.ll2020-07-07 12:21 1.8K 
[   ]copysign-casts.ll2020-07-07 12:21 3.4K 
[   ]compress.ll2020-07-07 12:21 4.8K 
[   ]compress-inline-asm.ll2020-07-07 12:21 425  
[   ]codemodel-lowering.ll2020-07-07 12:21 5.1K 
[   ]calls.ll2020-07-07 12:21 7.9K 
[   ]calling-conv-sext-zext.ll2020-07-07 12:21 9.4K 
[   ]calling-conv-rv32f-ilp32.ll2020-07-07 12:21 2.7K 
[   ]calling-conv-lp64.ll2020-07-07 12:21 6.9K 
[   ]calling-conv-lp64-lp64f-lp64d-common.ll2020-07-07 12:21 17K 
[   ]calling-conv-lp64-lp64f-common.ll2020-07-07 12:21 2.1K 
[   ]calling-conv-ilp32f-ilp32d-common.ll2020-07-07 12:21 8.6K 
[   ]calling-conv-ilp32d.ll2020-07-07 12:21 12K 
[   ]calling-conv-ilp32.ll2020-07-07 12:21 6.8K 
[   ]calling-conv-ilp32-ilp32f-ilp32d-common.ll2020-07-07 12:21 37K 
[   ]calling-conv-ilp32-ilp32f-common.ll2020-07-07 12:21 11K 
[   ]callee-saved-gprs.ll2020-07-07 12:21 8.7K 
[   ]callee-saved-fpr64s.ll2020-07-07 12:21 6.0K 
[   ]callee-saved-fpr32s.ll2020-07-07 12:21 7.9K 
[   ]byval.ll2020-07-07 12:21 1.3K 
[   ]bswap-ctlz-cttz-ctpop.ll2020-07-07 12:21 16K 
[   ]branch.ll2020-07-07 12:21 2.9K 
[   ]branch-relaxation.ll2020-07-07 12:21 1.6K 
[   ]blockaddress.ll2020-07-07 12:21 920  
[   ]bare-select.ll2020-07-07 12:21 905  
[   ]atomic-rmw.ll2020-07-07 12:21 569K 
[   ]atomic-load-store.ll2020-07-07 12:21 32K 
[   ]atomic-fence.ll2020-07-07 12:21 1.6K 
[   ]atomic-cmpxchg.ll2020-07-07 12:21 88K 
[   ]atomic-cmpxchg-flag.ll2020-07-07 12:21 1.1K 
[   ]arith-with-overflow.ll2020-07-07 12:21 2.2K 
[   ]analyze-branch.ll2020-07-07 12:21 2.2K 
[   ]alu64.ll2020-07-07 12:21 11K 
[   ]alu32.ll2020-07-07 12:21 6.1K 
[   ]alu16.ll2020-07-07 12:21 7.0K 
[   ]alu8.ll2020-07-07 12:21 6.5K 
[   ]alloca.ll2020-07-07 12:21 3.1K 
[   ]align.ll2020-07-07 12:21 318  
[   ]addcarry.ll2020-07-07 12:21 1.5K 
[   ]addc-adde-sube-subc.ll2020-07-07 12:21 855  
[   ]add-before-shl.ll2020-07-07 12:21 3.7K 
[DIR]GlobalISel/2020-07-07 12:21 -